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DIE SIZE CALCULATION

iSine is your complete resource for ASIC design - from concept to manufacturing and testing. We have expertise in system architecture, VHDL, Verilog, gate arrays, mixed signal, full custom analog, digital, high-voltage and low-power designs. Applications include medical, military, lighting, networking and video.

We specialize in obsolete IC redesign and high-voltage analog combined with low-voltage digital on the same chip. As a fabless semiconductor company, iSine can help you select the correct process for your design so that you can meet your schedule, your specs, and your budget.

Because of the proprietary nature of some of the calculations, we cannot provide an online calculator. Please contact iSine to get an estimate of your die size in a variety of technologies.

Information used in the calculation include:

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Die Size Calculation Example

Die size is calculated using sizes of known cell libraries, IP blocks, digital gate count, routing area estimates, and new block area estimates by the circuit designer/supplier.

In this example, a small mixed signal design die size is estimated in three technologies appropriate to the circuit size and product volume. It contains 60K gates of digital logic, plus various analog functions. The design has 24 pads.

Click here to see the pdf of the example in more detail.


Each sub-block is listed along with its area in each technology. Pad area, digital, and analog sections are calculated separately then combined to give the following results:

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