The customer was a startup with a design for a graphics processor that needed no external memory. The technology was targeted to applications that required a small footprint – bezels in laptops, chromebooks and similar devices. The customer's design team wrote the RTL and performed synthesis but did not have physical design tools or expertise. The schedule was incredibly tight – they were working to hit a specific launch date to meet customer demands. With small size requirements on the final assembly, an extra power supply (regulator) was needed to power the subsystem. The customer selected a semiconductor fab that had a very small presence in the US and support was in China.
iSine engineers reviewed the design and requirements, the synthesis results, static timing information and determined it would meet technical requirements in a SMIC 65nm technology. While the design was primarily a ‘digital implementation’ project, the requirement for an on-chip analog regulator was designed by iSine engineers. The iSine team worked evenings and through weekends to meet the aggressive schedule.
The ASIC implementation (and analog regulator design) was completed in three months – it met the super-aggressive schedule. When the devices returned, they powered up and functioned in the lab. The CEO told us that this was his third startup and the first one to have the first design work on the first attempt. The design met the requirements and met the aggressive schedule and the Firm-Fixed price contract met the budget.