The customer was looking to deliver a joystick for use on hand-held devices, including smartphones, game handheld controllers and other similar applications. The requirement was for ultra-low power, small size and integrated with the drive electronics on the same substrate.

iSine designed a MEMs-based pointing device as additional masks and steps on an existing process node at X-Fab. The MEMs device would sense movement in 2 axis, and provide an electrical signal that would be interpreted by the controller electronics. The MEMs device was implemented on a standard process node at X-Fab to allow for some sensing and amplification of the signal on the same substrate.

The customer was a startup with a design for a graphics processor that needed no external memory. The technology was targeted to applications that required a small footprint – bezels in laptops, chromebooks and similar devices. The customer's design team wrote the RTL and performed synthesis but did not have physical design tools or expertise. The schedule was incredibly tight – they were working to hit a specific launch date to meet customer demands. With small size requirements on the final assembly, an extra power supply (regulator) was needed to power the subsystem. The customer selected a semiconductor fab that had a very small presence in the US and support was in China.

iSine engineers reviewed the design and requirements, the synthesis results, static timing information and determined it would meet technical requirements in a SMIC 65nm technology. While the design was primarily a ‘digital implementation’ project, the requirement for an on-chip analog regulator was designed by iSine engineers. The iSine team worked evenings and through weekends to meet the aggressive schedule.

A MEMS startup was behind schedule on design and layout for an analog-digital signal converter (ADC). 

An iSine engineer worked on site full time and weekends using Cadence Virtuoso Module Generator software. Layout, DRC and LVS were completed on time.

A video processing startup needed a large video processor for wireless transfer of HDMI signals. The high density HDMI signal needed to be transferred at high speeds over a wireless signal without major losses.

A mixed-signal ASIC with a custom 20-channel SERDES (for high-speed communication) was designed for this chip. iSine selected the fab process to optimize performance and cost.

This pet product company needed a second source for five ASIC chips. A third-party circuit designer to create the circuitry for their product, but they did not have the expertise or tools to do the back-end of the design.

iSine did the specification reviews, LVS & DRC for the layout, test development and production. 

Consumer

iSine can design an IC that meets your specification, schedule and budget

Custom Analog and Digital ASIC Design

iSine does ASIC development from spec to production ICs, specializing in

  • mixed signal
  • analog
  • high voltage analog with low voltage logic on same chip
  • ultra-low power, low noise and low voltage chips

iSine's staff has broad system level design backgrounds in

  • communication
  • memory subsystems
  • microprocessor design

System level expertise in

  • medical devices
  • military and aerospace
  • communications
  • graphics and video
  • microprocessor subsystems
  • memory management
  • lighting
  • industrial control

Translate modeling languages (Python, Matlab, Matmatica) to RTL

iSine has IC process expertise, with engineers from physics and IC process development backgrounds

Layout Services

  • Block level or complete chip
  • Layout, LVS and DRC
  • Analog expertise: matching, ohmic drops, symmetry, spacing
  • Layout experience with
    • Silvaco Expert
    • ICED
    • Cadence Virtuoso
    • Tanner L-Edit

iSine is ITAR registered.

FPGAs

iSine has expertise in designing and debugging FPGAs.

  • Migrate EOL FPGAs to newer FPGA family with board redesign
  • FPGA development expertise in both Altera and Xilinx
  • Prototype for "proof of concept" before ASIC development
  • FPGA platform allows software debug in parallel with ASIC design
  • Incorporate 3rd party or in-house IP along with customer specific RTL

IC Lifecycle Management

iSine has the expertise to re-design an IC product that is at the end of its life and can no longer be purchased. We specialize in analog and mixed signal applications, but we can also create the RTL, place and route, manufacture and test fully digital designs. We will use the process that works best for your chip. 

  • Start from spec, schematic, or IC samples 
  • Choose most compatible and cost-effective process
  • Use CMOS, BiCMOS, or BiPolar processes
  • Evaluate existing design
  • Simulate critical circuits and device matching
  • Simulate, layout, DRC and LVS of final design
  • Develop test 
  • Evaluate test results 

System Architecture

We take a systems approach to all our architecture definition whether it is for an IP Block for a component, a full component, a sub-assembly or a full system. Understanding the environment in which the design is targeted provides opportunity for optimizations and enhanced robustness. We have a long history of designing IP Blocks, ASIC/FPGA components, sub-assemblies and full  systems in digital, mixed signal, analog, high voltage and mixed voltage areas. 

  • High level language code translation to VHDL or Verilog: Mathematica, Matlab, Python
  • IP Blocks for ASIC/FPGA: VHDL or Verilog solutions
  • FPGA controllers: VHDL or Verilog solutions
  • ASIC controllers: VHDL, Verilog or custom designed solutions
  • SOC solutions: Embedded microprocessors, mixed signal
  • Sub-assemblies: Custom packaged solutions or hybrid assemblies
  • Custom Load Boards: For testers

Printed Circuit Board Design and Manufacturing 

iSine can design and manufacture your PCB's with extremely fast turnaround. 

  • Design, development, and manufacture
  • Fast turn design and prototyping
  • Circuit design & PCB layout
  • Focus on turnkey development and manufacture of short run, high tech boards

iSine can design and build what you need, from prototype to production

  • FR4 and Exotics
  • Fine Line, 3 mil pitch, 3 mil space
  • 3 mil Laser Via, 6 mill drill, Buried Vias, Via in Pad
  • ENEPIG COB
  • Die Stack COB
  • Advanced Heat Sinking:  Copper Coin, MCPCB, Thermal Connectors
  • Advanced POL
  • Flip Chip and Glop Top
  • High Density Interposer design and fabrication
  • 1-52 layers
  • Through Hole and SMT down to 01005
  • ITAR

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Lighting Products

iSine has cost-effective and extremely efficient ballast IC drivers for both LED and CFL lighting. Lifetimes are dramatically increased because electrolytic capacitors are not neeeded.

iSine's standard products for lighting are detailed on the Lighting Industries page.

 

IP Products

iSine has several intellectual property blocks, including a low-jitter (<10ps) PLL.  We have developed many other core and I/O IP for a variety of technologies.

Low-Jitter Phase Lock Loop

This PLL Cell is designed for the TSMC 0.13µm process technology, but can also be used at 0.18µm. All loop filter components and dividers are fully integrated within the cell. A divide-by-N circuit is available to permit clock multiplication from a reference clock. A VCO post processing macro is available to produce VCO-half-rate and VCO-quarter-rate true and complement outputs. In addition, a four-phase (differential quadrature) direct VCO output clock is available. The VCO operates nominally at 280MHz, but is capable of operation from 140 to 500MHz. The cell achieves the frequency-multiply operations through the divider network shown in the PLL Cell Block Diagram below. Additionally, the feedback divide value is user selectable at each integer value between 4 and 16. For each valid M-divider value, recommended settings for two control bits are tabulated.

Core IP

  • Video Op Amps
  • Bandgap references
  • Current generators
  • Flash A/D converter
  • Programmable attenuator
  • Digital blocks for specific speed, matching performance or power requirements

I/O IP

  • Complete PCI 5V tolerant pad library
  • Alphabet pads: HECL, PECL, ECL, LVDS, HSTL
  • USB 2.0/OTG Vbus generator
  • Auto-correcting 50 ohm impedance matched driver
  • Clock drivers and crystal oscillators
  • ESD protection pads

ACCEL™ Power Regulator

iSine's ACCEL™ Power Regulator can increase die yield, performance and reliability.  This product will simplify time closure for both custom ICs and FPGAs. The ACCEL™ products were developed to control IC supply voltages, optimizing device performance. Better speed and power is achieved by optimizing for process, voltage, and temperature variations in real time. 

By managing the supply voltage, ACCEL products optimize the speed-power point, negating the effects of fast and slow silicon process points and simplifying timing closure. ACCEL™ can also improve product lifetimes by as much as 400%!

The ACCEL™ Power Regulator uses the ACCEL™ Sensor IP block on the chip to modify operating voltage, which controls the speed and power of the chip.

ACCEL Performance

The ACCEL™ product family is currently in use at the Dominion Radio Astrophysical Observatory's EVLA radio telescope in New Mexico. It has decreased power consumption and increased correlator lifetime.

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